大家好,report machine相信很多的网友都不是很明白,包括reports也是一样,不过没有关系,接下来就来为大家分享关于report machine和reports的一些知识点,大家可以关注收藏,免得下次来找不到哦,下面我们开始吧!

如何把report machine安装到delphi里

delphi里组件的安装,要根据控件包的类型来完成。

report machine,reports

如果组件有源代码,可以先把源代码路径添加到 delphi的库路径和搜索路径里,然后找到*.dpk文件(注意选择与 delphi版本相对应的),再进行编译和安装就可以了。

如果无源代码,只有.dcu,那么就只需要添加路径后,直接安装。

machine report 主项数据、细项数据如何关联

一般,将数据传入rdlc有两种方式:数据源和参数。

数据源一般是数据的集合,例如多行数据;参数一般是比较离散的数据,例如报表的标题,作者等。

对于前者,可以通过报表向导:添加新项-〉报表向导-〉添加数据源,这里选择对象,然后指定你写的对象-〉下一步。。。。后面比较简单了。

report machine,reports

对于参数,添加了报表以后,点击菜单栏的“参数”,然后添加你要的。

report_timing命令

report_timing

[-clock_from edge_from{lead| trail}]]

[-clock_to clk_signame_list][-edge_to{lead| trail}]]

[-rise|-fall]

[-early|-late]

[-hpin]

[-check_type{setup| hold| pulse_width| clock_period|clock_gating_setup

| clock_gating_hold| clock_gating_pulse_width| data_setup| data_hold|recovery| removal| clock_separation

| skew| no_change_setup| no_change_hold}

[–debug{time_borrow| unconstrained}]

[-max_paths integer|[-nworst integer ]

|-begin_end_pair]

[{-from|-from_rise|-from_fall} pin_list ]

[{-through|-through_rise|-through_fall} pin_list ]

[{-not_through|-not_rise_through|-not_fall_through} object_list ]

[{-to|-to_rise|-to_fall} pin_list ]

[-point_to_point]

[-check_clocks]

[-path_group groupname_list ]

[-path_exceptions{applied| ignored| all}]

[-net]

[-unique_pins]

[-path_type{end| summary| full| full_clock| end_slack_only|summary_slack_only}]

[-max_slack float ]

[-min_slack float ]

|-unconstrained [-delay_limit float ]

]

[-view{ viewName}]

[-format column_list ]

[-collection]

[-machine_readable ]

report_timing是平时分析timing时用得最多的一个命令,它可以报出一条完整path的详细timing信息。前文有介绍过timing report的格式

【Innovus/Encounter时序报告解读】

大家看完上面这篇文章后,应该能更好地理解report_timing这个命令

-clock_from指定source clock,只报出以该clock作为source clock的path,见例子1

-clock_to指定traget clock,只报出以该clock作为target clock的path,见例子1

-edge_from{lead| trail}指定source clock的edge, leading还是trailing,只报出该edge下的path,用在-clock_from上,见例子2

-edge_to{lead| trail}指定target clock的edge,leading还是trailing,只报出该edge下的path,用在-clock_to上,见例子2

-rise|-fall指定endpoint上的edge是rise还是fall,只报出符合这种情况的path,见例子3

-early|-late报出用于hold分析的early path,以及setup分析的late path,见例子4。early path以及late path的区别,如下图所示:

-hpin hpin字栏里如果是hierarchical pin,就在生成的report中显示hpin字样,见例子5

-check_type 报出指定检查类型的path,检查的类型包括以下几种

setup| hold|pulse_width| clock_period| clock_gating_setup| clock_gating_hold|clock_gating_pulse_width| data_setup| data_hold| recovery| removal|clock_separation| skew| no_change_setup| no_change_hold

具体每种类型介绍可以参考

【每天学命令】

–debug{time_borrow| unconstrained} 这个可以报出具体time borrow或者unconstrained的原因,见例子6

-max_paths 报出指定数量的相同end point的path timing情况,比如说:-max_paths 10就是报出10条最差的相同end point上的path timing情况。

-nworst报出指定数量的不同end point的path timing情况,比如说:-nworst 10就是报出10条最差的不同end point上的path timing情况。

-begin_end_pair对同一个start point和end point的path来说,只报出一条path

-from|-from_rise|-from_fall报出以指定pin上为起点的path,可以通过-from_rise或者-from_fall来控制起点的edge

-through|-through_rise|-through_fall 报出经过指定pin的path,可以通过-through_rise或者-through_fall来控制经过pin的edge

-not_through|-not_rise_through|-not_fall_through 报出不经过指定pin的path,可以通过-not_rise_through或者-not_fall_through来控制不经过该pin的edge

-to|-to_rise|-to_fall 报出以指定pin为终点的path,可以通过-to_rise或者-to_fall来控制终点的edge

-point_to_point 报出design中累计的arrival time,见例子7

-check_clocks生成clock capture path上的具体timing report信息,而不是传统的data path上的delay,见例子8

-path_group报出指定path group上的timing信息,见例子9

-path_exceptions{applied| ignored| all} 在timing report的最后加上path exception情况,applied代表报出path honor的path exception,类似自己设置的path exception可以被报出来那种;ignore代表报出path ignore掉的path exception,类似设置了好几种path exception,有几条被忽略了这种;all代表两种都报出来,见例子10

-net 把net的delay也报出来,会在timing format里多生成一栏,见例子11

-unique_pins对同一个start point和end point的pin来说,只报出一条path上的timing信息,见例子12

-path_type根据path类型指定生成的timing report,一共有以下几种

end:生成的report只含有endpoint, cause, slack, arrival time, required time, phase和view信息,这是简化版的report,见例子13

summary:生成的report只含有start point, endpoint, cause, slack, arrival time, required time, phase和view信息,见例子13

full:生成的report中含有整个clock launch path上的timing信息,这是默认的timing report格式,见例子13

full_clock:生成的report中会报出整个clock capture path上的timing信息,见例子13

end_slack_only:只报出endpoint上的slack值,见例子13

summary_slack_only:只报出beginpoint,endpoint上的slack值,见例子13

-max_slack:报出slack小于指定数值的timing path信息

-min_slack:报出slack大于指定数值的timing path

-unconstrained:报出unconstrained的timing path.如果path找不到对应的require time.那该条path就称为unconstrained path,见例子14

-delay_limit :指定unconstrained path的delay上限

-view :指定报出哪个analysis view下的timing情况

-format column_list:指定生成的timing report的格式,我们可以选择想要显示的列,所有的可以显示的列如下:adjustment, annotation, aocv_adj_stages, aocv_derate, arc, arrival, arrival_mean, arrival_sigma, arrival_sensitivity, arrival_sigma, cell, delay, delay_mean, delay_sigma, delay_sensitivity, delay_sigma, direction, edge, fanin, fanout, hpin, incr_delay, instance, instance_location, load, net, phase, phys_info, pin, pin_load, pin_location,power_domain, required, retime_delay, retime_incr_delay, retime_slew, slew,stage_count, stolen, transition, timing_point, total_derate, user_derate, voltage, when_cond, wire_load,见例子15

-collection返回timing path的指针,对于tcl指定很有用,见例子16

-machine_readable生成一个global timing debugger可以使用的文件

SSTA有关的那几个就不介绍了,暂时不是很懂

例子:

1. report_timing-clock_from CLK1-clock_to CLK2-max 100

Path 1: MET Setup Check with Pin ff6/CK

Endpoint: ff6/D(^) checked with leading edge of'CLK2'(target clk)

Beginpoint: ff3/Q(^) triggered by leading edge of'CLK1'(sourceclk)

2. report_timing-early-clock_from CLK2-clock_to CLK2-edge_to lead-edge_from trail-max_path 100

Path 1: MET Early External Delay Assertion

Endpoint: out(^) checked with leading edge of'CLK2'

Beginpoint: sub1/FF1/Q(^) triggered by trailing edge of'CLK2'

Path Groups:{CLK2}

3. report_timing-from in1-clock_from CLK-rise

Path 1: VIOLATED Setup Check with Pin ff1/CKN

Endpoint: ff1/D(^) checked with trailing edge of'CLK2'

Beginpoint: in1(^) triggered by leading edge of'CLK'

4.-early

<CMD> report_timing-from in1-clock_from CLK-rise-early

Path 1: MET Hold Check with Pin ff1/CKN

Endpoint: ff1/D(^) checked with trailing edge of'CLK2'

Beginpoint: in1(^) triggered by leading edge of'CLK'

-late

<CMD> report_timing-from in1-clock_from CLK-rise-late

Path 1: VIOLATED Setup Check with Pin ff1/CKN

Endpoint: ff1/D(^) checked with trailing edge of'CLK2'

Beginpoint: in1(^) triggered by leading edge of'CLK'

5. report_timing-hpin

6. time_borrow

<CMD> report_timing-to ff02/D-from ff01/Q-view view6-debug time_borrow

unconstrained

<CMD>report_timing-to out1-view view1-unconstrained-debug unconstrained

Path Unconstrained Reason:

-------------------------------

The endpoint'out1' is an unconstrained output port, with noset_output_delay constraint

7.<CMD> report_timing-point_to_point

8.<CMD> report_timing-check_clocks-unconstrained-from clock1

9.<CMD> report_timing-max_paths 100-path_group CLOCK2

10.<CMD> report_timing-early-clock_from CLK-from in2-through buf133/A-to dff1/D-path_exceptions all

11.<CMD> report_timing-net

12. report_timing-path_type summary_slack_only-unique_pins

13. report_timing-path_type end

report_timing-path_type summary

report_timing-path_type full

report_timing-path_type full_clock

report_timing-path_type end_slack_only

report_timing-path_type summary_slack_only

14. report_timing-unconstrained

Path 1: Endpoint: DTMF_INST/TDSP/p_reg_30/D(^)(unconstrainedoutput)

Beginpoint: DTMF_INST/TDSP/ir_reg_9/Q(^) triggered by

leading edge of'vclk1'

Arrival Time 15.807

Analysis View: default_analysis_view_setup

+ Clock Network Latency(Prop) 1.995

= Beginpoint Arrival Time 1.995

15. report_timing-unconstrained-format{pin arrival phase}

16. report_timing [report_timing-collection]

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